Power Distribution Networks with On-Chip Decoupling Capacitors By Renatas Jakushokas

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The first planar circuit was fabricated by Fairchild Semiconductor Company in 1959. Since then, the evolution of the integrated circuit has progressed, now providing billions of transistors on a single monolithic substrate. These integrated circuits are an integral and nearly essential part of our modern life. The power consumed by a typical 20×20 mm2 microprocessor is in the range of several hundreds of watts, making integrated circuits one of the highest power consumers per unit area. With such a high rate of power consumption, the problem of delivering power on-chip has become a fundamental issue. The focus of this book is on distributing power within high performance integrated circuits. 
             In 2004, the book titled Power Distribution Networks in High Speed Integrated Circuits by A. V. Mezhiba and E. G. Friedman was published to describe, for the first time in book form, the design and analysis of power distribution networks within integrated circuits. The book described different aspects of on-chip power distribution networks, starting with a general introduction and ending with a discussion of various design tradeoffs in on-chip power distribution networks. Later, the important and highly relevant topic of decoupling capacitance was added to this book. Due to the significant change in size and focus, the book was released in 2008 as a new first edition with a new title, Power Distribution Networks with On-Chip Decoupling Capacitors by M. Popovich, A. V. Mezhiba, and E. G. Friedman. Since this revised book was published, new design and analysis challenges in on-chip power networks have emerged. 
             The rapidly evolving field of integrated circuits has required an innovative perspective on on-chip power generation and distribution, shifting the authors’ research focus to these new challenges. Updating knowledge on chip-based power distribution networks is the primary purpose for publishing a second edition of Power Distribution Networks with On-Chip Decoupling Capacitors. Focus is placed on complexity issues related to power distribution networks, developing novel design methodologies and providing solutions for specific design and analysis issues. In this second edition, the authors have revised and updated previously published chapters and added four new chapters to the book. This second edition has also been partitioned into sub-areas (called Parts) to provide a more intuitive flow to the reader.                
            The organization of the book is now separated into seven parts. A general background, introducing power networks, inductive properties, electromigration, and decoupling capacitance within integrated circuits, is provided in Part I (Chapters 1 to 7). In Part II (Chapters 8 to 12), the design of on-chip power distribution networks is discussed. Since noise within the power grid is a primary design constraint, this issue is reviewed in Part III (Chapters 13 to 19). In Part IV (Chapters 20 to 23), the primary issue of placing on-chip decoupling capacitors is discussed. Multi-layer power distribution networks are the focus of Part V (Chapters 24 to 26). In Part VI (Chapter 27 to 30), multiple power supply systems are described. The focus of this part is on those integrated circuits where several on-chip power supplies are required. In Part VII, some concluding comments, the appendices, and additional information are provided. 
             This revised and updated material is based on recent research by Renatas Jakushokas and Sel¸cuk K¨ose developed between 2005 and 2010 at the University of Rochester during their doctoral studies under the supervision of Prof. Eby G. Friedman. The emphasis of these newly added chapters is on the complexity of power distribution networks. Models for commonly used meshed and interdigitated interconnect structures are described. These models can be used to accurately and efficiently estimate the resistance and inductance of complex power distribution networks. With these models, on-chip power networks can be efficiently analyzed and designed, greatly enhancing the performance of the overall integrated circuit. 
            The book covers a wide spectrum of issues related to on-chip power distribution networks. The authors believe that this revised edition provides the latest information into what is a quickly changing and highly important topic to both the industrial and academic research and development communities.

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